Common control variable shift reframe circuit

H - Electricity – 04 – J

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363/17

H04J 3/06 (2006.01) H04L 5/22 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 1043464

COMMON CONTROL VARIABLE SHIFT REFRAME CIRCUIT Abstract of the Disclosure The PCM encoded digital data groups transmitted to a switching office are respectively stored a frame at a time and then read out from store in the sequence such that a plurality of digital groups are multiplexed on to a common bus. The disclosed reframe circuit utilizes common control circuitry to carry out, in the same time frame, a reframing operation for any and all of the multiplexed digital groups which are out-of-frame. An "old" data store is used to store a given number of selected data bits, of each group, for two frames for framing comparison purposes. A reframe comparator serves to compare, for each group, the output of the old data store with new data that is two frames later in time. A suitability store is used to record, for each group, which of the compared data bits have had framing pattern violations. A shift decoder determines how many digit shifts, if any, should be made by the reframer, based on the present set of comparisons and past suitabilities, in order to move to the next candidate for the framing bit. Once the number of shifts is determined, the old data store, the suitability store and the write address logic of the receive data store for the out-of-frame digital group(s) are shifted by the determined number of digit shifts in preparation for the next set of data bit comparisons. The described operation is then repeated until the framing bit is recaptured.

240111

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