Stacked semiconductor memory

G - Physics – 11 – C

Patent

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352/82.3

G11C 11/40 (2006.01) G11C 11/405 (2006.01) H01L 21/822 (2006.01) H01L 27/06 (2006.01) H01L 27/108 (2006.01)

Patent

CA 1222821

- 1 - Abstract: In a 3-transistor random access memory for dynamic operation, one of the transistors is stacked on the other transistor. A transistor for writing is disposed on a transistor for reading, and one of its terminals is used in common with the gate electrode of a transistor for judging data. The other terminal is connected to one of the terminals of the transistor for reading. The result is a memory cell capable of extremely large scale integration.

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