H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/126
H01L 27/115 (2006.01) H01L 21/314 (2006.01)
Patent
CA 1232365
DUAL ELECTRON INJECTION STRUCTURE AND PROCESS WITH SELF-LIMITING OXIDATION BARRIER Abstract of the Disclosure A dual electron injection structure (DEIS) and process for incorporating it into a semi-conductor structure, such as an E2PROM and/or NVRAM, is disclosed. The DEIS includes a composite structure formed from a layer of silicon rich nitride, a layer of silicon dioxide (SiO2) and a layer of silicon rich oxide. Preferably, a Plasma Enhanced Chemical Vapor Deposit (PECVD) method or a low pressure chemical vapor deposit (LPCVD) method is used to place the DEIS between the Poly 1 and Poly 2 devices of the semi-conductor structure. Background of the Invention 1. Field of the Invention The invention relates generally to semi-conductor memory devices. Particularly, the invention relates to Electronically Erasable Programmable Read-Only Memory (E2PROM) or Electrically Alterable Read-Only Memory (EAROM) and to non-volatile random access memory (NVRAM). 2. Prior Art U.S. Patent 4,458,407 (entitled "Process for Fabricat- ing Semi-Conductive Oxide Between Two Polysilicon Gate Electrodes," filed on April 1, 1983, issued July 10, 1984 to Hoeg et al, and assigned to the assignee of the present invention) sets forth a full description of the prior art
493207
Kroll Charles T. Jr.
Stephens Geoffrey B.
Barrett B.p.
International Business Machines Corporation
LandOfFree
Dual electron injection structure and process with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dual electron injection structure and process with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual electron injection structure and process with... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1174985