Method for producing integrated mos field effect transistors...

Details Method for producing integrated mos field effect transistors... Method for producing integrated mos field effect transistors...

H - Electricity

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356/128

H01L 29/78 (2006.01) H01L 21/311 (2006.01) H01L 21/768 (2006.01)

Patent

CA 1200616

ABSTRACT A method of producing integrated MOS field effect tran- sistors is provided wherein an additional interconnect consisting of a metal silicide is utilized. All contacts to the active MOS regions and polysilicon regions for the metal silicide level and for the metal interconnect - silicide mushroom contacts - as well, are opened before the deposition of the metal silicide layer. In order to achieve an overlapping contact, a layer comprised essenti- ally of a silica-phosphorus glass layer is utilized as an insula- tion layer between the polysilicon level and the silicide level. This layer is of such a nature as to effect a high selectivity of an etching agent by itself, relative to the thermally generated oxide regions positioned on the substrate, relative to the poly- silicon regions and relative to the substrate, when producing the contact holes. In preferred embodiments, a HF/NH4F etching mix- ture is utilized as the etching agent. The method is useful in production of complementary MOS field effect transistor circuits in VLSI technology.

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