Memory management arrangement for microprocessor systems

Details Memory management arrangement for microprocessor systems Memory management arrangement for microprocessor systems

G - Physics

06

F

354/230.82

G06F 9/46 (2006.01)

Patent

CA 1182927

MEMORY MANAGEMENT ARRANGEMENT FOR MICROPROCESSOR SYSTEMS Abstract A memory management system is structured for use with a self-contained microprocessor to form a multi-user computer. The system operates to establish user and kernel modes each having different operating permissions. When the system is operating in the user mode, certain of the fixed functions of the microprocessor, such as interrupt- off and halt, are blocked from enablement by any user. The system is designed having multiple memory maps, some accessible when in the user mode and all accessible from the kernel mode.

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