Three-state output buffer

Details Three-state output buffer Three-state output buffer

G - Physics

06

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354/236

G06F 1/00 (2006.01) G06F 13/16 (2006.01) G06F 13/20 (2006.01) H03K 19/082 (2006.01)

Patent

CA 1205920

935.071 Title: IMPROVED THREE-STATE OUTPUT BUFFER Inventor: ADRIAN PAUL BROKAW ABSTRACT OF THE DISCLOSURE A three-state output buffer delivering digital signals to a multi-line bus when in the data state, and presenting a high- impedance to the bus in the third state. The buffer output includes a two-transistor totem pole. Individual control tran- sistor drivers are provided to switch the output transistors off when switching to the third state. The control transistors are actively driven both on and off. One of the output transistors includes an inverted-mode auxiliary collector which reduces base drive and saturation in that transistor, and which serves to hold off the other output transistor. Common control cir- cuitry for all the buffer stages includes special means for reducing saturation effects to speed up control signals.

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