Integrated injection logic semiconductor memory device

Details Integrated injection logic semiconductor memory device Integrated injection logic semiconductor memory device

G - Physics

11

C

352/40

G11C 11/40 (2006.01) G11C 5/06 (2006.01) G11C 11/411 (2006.01) G11C 11/415 (2006.01) G11C 11/416 (2006.01) H01L 27/02 (2006.01) H03K 3/288 (2006.01)

Patent

CA 1175143

ABSTRACT OF THE DISCLOSURE A semiconductor memory circuit device is disclosed. The semiconductor memory circuit device is conventionally comprised of a plurality of memory-cell arrays. Each of the memory-cell arrays is conventionally provided with a plurality of IIL memory cells, a pair of positive word line and negative word line and further a plurality of bit lines. An the semiconductor memory circuit device at least one means for discharging electric charges is newly incorporated with each negative word line. Said means becomes active only when the corresponding memory-cell array changes from selection status to non-selection status.

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