Structure and process for fabricating complementary vertical...

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Details

CPC

356/23

IPC codes

H01L 27/06 (2006.01) H01L 27/082 (2006.01) H01L 27/102 (2006.01)

Type

Patent

Patent number

CA 1291577

Description

ABSTRACT A compact complementary transistor switch (CTS) memory cell structure utilizing both vertical PNP and vertical NPN transistors in gallium arsenide technology is described. The base region of the vertical PNP transistor merges with the collector region of the vertical NPN transistor. The collector region of the vertical PNP transistor merges with the base region of the vertical NPN transistor. The emitter of the vertical PNP transistor is at the top, and the emitter of the vertical NPN transistor is at the bottom in relation to the emitter of the vertical PNP transistor. This structure leads to improvements in memory density, performance and wireability of a memory array compris- ing many such cells. A novel yet simple process for making such compact CTS memory cells is also disclosed. FI9-87-018

Application Number

601596

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