G - Physics
11
C
354/232
G11C 19/00 (2006.01) G06F 5/01 (2006.01)
Patent
CA 1175154
Abstract of the Disclosure A shift circuit comprises a plurality of stages of data selectors, a first data selector, a second data selector and a temporary register. The data selectors shift an n-bit input data by m bits which are specified by a shifting amount data and produces a first output data or a second output data. The first and second data selectors selectively output the first and second output data in accordance with shift direction. The temporary register comprises n bits for storing a data which is not selected by said first or second data selector.
385404
Ridout & Maybee Llp
Tokyo Shibaura Denki Kabushiki Kaisha
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