Apparatus and method for synchronization of arithmetic...

G - Physics – 06 – F

Patent

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354/230

G06F 9/38 (2006.01)

Patent

CA 1304823

ABSTRACT In a data processing system in which the component central processing units can have a plurality of parallel pipelined execution units, an instruction, and apparatus for implementation of the instruction, are provided which facilitates the synchronization of arithmetic exceptions with the context environment in which the instruction should execute. The current invention permits the central processing unit to complete instructions currently being processed by the execution units, but prevents further instructions from being initiated until all currently executing instructions have been completed and all outstanding exception conditions have been resolved. After all the instructions preceding the DRAIN instruction of the present invention in the program instruction sequence have been executed, the central processing unit can continue to execute the sequential program instructions when no arithmetic exception has been identified, or can invoke an exception handling procedure when an arithmetic exception has been identified. The instruction is typically positioned in an instruction sequence after an instruction that has high degree of probability of resulting in the identification of an arithmetic exception condition. The DRAIN instruction permits the source of the exception to be localized and permits the response to all arithmetic exceptions associated with instructions initiated before the DRAIN instruction, but identified after the execution of the DRAIN instruction, to be handled in the same context environment in which the instruction was initiated.

561849

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