H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/17
H04J 3/06 (2006.01) H04J 3/07 (2006.01)
Patent
CA 1188436
ABSTRACT A multiplexing and demultiplexing system in which the lower rate digital signals are synchronous while the higher rate numerical signals are plesiochronous. Justification is provided between low rate synchronous numerical signals and high rate plesiochronous numerical signals, comprising a time base or clock. A multiplexing unit has an output which is connected to the high rate output and synchronization units comprising phase comparing units and connected from the lower rate input lines. common justification circuit delivers the clock pulse rate for reading the synchronization units. A common justification authorizing circuit has a clock input which is connected from the corresponding output of the time base or clock. One control output of this authorizing circuit is connected to the control input of the justification circuit, the data output of which is connected from the input of a common insertion circuit for inserting the justification indicator bits, the data inputs of which respectively are connected from the outputs of the synchronization units and the outputs which are connected to the inputs of the multiplexing unit which delivers the high rate signals. There is further provided a control input of the common justification authorization circuit which is connected from the output of an OR gate, the inputs of which are connected from the corresponding outputs of the phase comparing devices in the synchronization units.
396200
Billy Jean-Claude
Shapiro Cohen
LandOfFree
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