Precision high-value mos capacitors

Details Precision high-value mos capacitors Precision high-value mos capacitors

H - Electricity

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L

356/25

H01L 21/22 (2006.01) H01L 21/02 (2006.01) H01L 21/265 (2006.01) H01L 21/321 (2006.01)

Patent

CA 1232361

PRECISION HIGH-VALUE MOS CAPACITORS ABSTRACT OF THE DISCLOSURE A method for producing an improved capacitor in MOS technology utilizing a thin layer oxide dielectric to improve the active/parasitic capacitance ratio while maintaining a high breakdown voltage and a low leakage current. A polycrystalline silicon layer is formed over a silicon dioxide field region on a wafer of semi- conductor silicon. Phosphorus ions are implanted in the polycrystalline silicon layer at an implant energy between approximately 80 and 100 keV. The surface of the polycrystalline silicon layer is oxidized to form an interpoly oxide, utilizing an oxidation temperature which, for the implant dosage of phosphorus ions used, is sufficient to make the interpoly oxide layer approximately 770 Angstroms thick. The structure is then annealed at a temperature of approximately 1100°C in oxygen and HCl. A second polycrystalline silicon layer is formed over the interpoly oxide layer, and the process completed in the conventional manner.

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