H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/172
H01L 23/52 (2006.01) H01L 21/768 (2006.01) H01L 23/528 (2006.01)
Patent
CA 1220562
ABSTRACT An integrated circuit having a plurality of devices on a substrate is disclosed, wherein a plurality of metallization layers, separated by a plurality of insulating layers, are used to interconnect the devices. Each metallization layer is recessed in an upper portion of a corresponding dielectric layer. A metallization layer is connected to a lower one, or, in the case of the first metallization layer, to the devices, by solid contacts extending through via windows in the lower portion of the corresponding dielectric layer. A method of manufacturing such an integrated circuit is also disclosed, whereby each layer is formed in two steps. First, the lower portion of the insulating layer is deposited, the contact pattern opened and the vias windows filled with metal to provide contacts even with the top surface of the lower portion of the insulating layer. Then, the upper portion of the insulating layer is deposited over the lower portion, the metallization pattern opened, and the pattern filled with metal up to and even with the top surface of the upper portion of the insulating layer. The metal filling step is produced by depositing a metal layer over the corresponding portion of opened insulating layer, masking the opened regions and selectively and directionally removing the unprotected metal layer.
456675
Digital Equipment Corporation
Smart & Biggar
LandOfFree
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