H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/128, 356/23
H01L 27/10 (2006.01) H01L 21/8244 (2006.01) H01L 21/8249 (2006.01) H01L 27/06 (2006.01) H01L 27/11 (2006.01) H01L 29/04 (2006.01) H01L 29/08 (2006.01) H01L 29/45 (2006.01)
Patent
CA 1258320
ABSTRACT OF THE DISCLOSURE There is disclosed a static RAM cell and MOS device for making the cell along with a process for making the types of devices disclosed. The device is an MOS device built in an isolated island of epitaxial silicon similar to bipolar device isolation islands, and has single level polysilicon with self-aligned silicide coating for source, drain and gate contacts such that no contact windows need be formed inside the isolation island to make contact with the transistor. The static RAM cell formed using this device uses extensions of the polysilicon contacts outside the isolation isolation shared nodes to implement the conventional cross coupling of various gates to drain and source electrodes of the other transistors in the flip flop. Similarly. extensions of various gate, source and drain contact electrodes are used as shared word lines, and shared Vcc and ground contacts.
505292
Fairchild Semiconductor Corporation
Smart & Biggar
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