High speed memory management system and method

G - Physics – 06 – F

Patent

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354/243

G06F 12/14 (2006.01) G06F 12/10 (2006.01)

Patent

CA 1209715

-30- HIGH SPEED MEMORY MANAGEMENT SYSTEM AND METHOD Abstract of the Disclosure A virtual address and access protection code stored at that address are fetched simultaneously from secondary memory and stored in corresponding locations in first and second content addressable memories. When a program-generated virtual address is later applied to the first content addressable memory, corresponding access code is simultaneously applied to the second content addressable memory. Match signals obtained simultaneously from corresponding locations in both content addressable memories are combined to produce an access control signal to control access to data stored at a real memory address corresponding to the matched virtual address.

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