Method for manufacturing an integrated semiconductor circuit...

Details Method for manufacturing an integrated semiconductor circuit... Method for manufacturing an integrated semiconductor circuit...

H - Electricity

01

L

356/136

H01L 23/52 (2006.01) H01L 21/768 (2006.01) H01L 23/522 (2006.01) H01L 23/532 (2006.01)

Patent

CA 1216964

ABSTRACT OF THE DISCLOSURE A method for manufacturing an integrated semiconductor circuit having multi-layer wiring consisting of aluminum of an aluminum alloy employs the step of filling the contact holes between wiring layers with a non-aluminum metal which guarantees a good etching stop during etching of the second aluminum wiring. By providing a reliable etching stop by choosing an appropriate combination of etching process and non-aluminum metal, the problem of providing a safe gap between the wiring layers while still reliably electrically connecting the layers is overcome. The non-aluminum metal utilized as the contact hole filler is a high melting point metal, such as tungsten, or a silicide of a high melting point metal, such as tantalum silicide.

462222

Affiliated with

Also associated with

Rating

Method for manufacturing an integrated semiconductor circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing an integrated semiconductor circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing an integrated semiconductor circuit... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1261418