High-speed wire wrap board

H - Electricity – 05 – K

Patent

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356/10

H05K 1/02 (2006.01) H01L 23/52 (2006.01) H05K 3/22 (2006.01) H05K 3/46 (2006.01) H05K 1/00 (2006.01) H05K 1/16 (2006.01)

Patent

CA 1198829

Abstract of the Disclosure A panel board has a first voltage layer sandwiched between two ground layers at a close spacing to produce a large distributed capacitance. The two ground layers are connected by plated-through conductive holes spaced regularly across the board. A second (exposed) voltage layer is connected by regularly spaced plated-through holes to the first voltage layer, increasing the current carrying capacity of, and reducing the resistance across, the board. The plated-through holes are arranged in rows and columns in a pattern permit- ting the mounting to decoupling capacitors, at any point on the board, in a position parallel to the rows or parallel to the columns, and a socket terminal can be electrically connected directly to the exposed voltage layer or to the exposed ground layer using a ring connector.

419886

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