Level converting bus extender with subsystem selection...

Details Level converting bus extender with subsystem selection... Level converting bus extender with subsystem selection...

G - Physics

06

F

354/233

G06F 13/00 (2006.01) G06F 13/40 (2006.01) H03D 3/00 (2006.01)

Patent

CA 1291575

LEVEL CONVERTING BUS EXTENDER WITH SUBSYSTEM SELECTION SIGNAL DECODING ENABLING CONNECTION TO MICROPROCESSOR ABSTRACT The bus extender circuit is a least replaceable unit which interfaces between intermodule subsystems and the microprocessor controller of the system. The bus extender circuits are structured so that the subsystem modules may be placed in different power zones. As a result, one subsystem may be powered down without affecting the other subsystems connected to the microprocessor's bus. In addition, the bus extender circuit converts from Fairchild Advanced Schottky TTL logic to high-speed CMOS logic and vice versa and allows bus interface gate arrays located in each subsystem to interface between the subsystem logic and the microprocessor. This bus extender circuit design eliminates the need for strapping options or DIP switches for address decoding.

547797

Affiliated with

Also associated with

Rating

Level converting bus extender with subsystem selection... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Level converting bus extender with subsystem selection..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Level converting bus extender with subsystem selection... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1270542