Prioritized clock selection circuit

G - Physics – 06 – F

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344/24

G06F 1/04 (2006.01) G06F 11/20 (2006.01) H04J 3/06 (2006.01) H04L 7/00 (2006.01) H04Q 3/54 (2006.01)

Patent

CA 1227858

PRIORITIZED CLOCK SELECTION CIRCUIT ABSTRACT OF THE DISCLOSURE A clock selection circuit which selects and enables one of a plurality of clock circuits in re- sponse to initialization by a processing unit or detec- tion of failure of an on-line clock circuit. The clock circuits are selected on the basis of a priority ar- rangement. The clock circuit failure is detected by a retriggerable monostable multivibrator and the selec- tion priority is based on time delays generated by programmed counters associated with each clock circuit.

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