Integrated circuit processing methods

Details Integrated circuit processing methods Integrated circuit processing methods

H - Electricity

01

L

356/136

H01L 23/52 (2006.01) H01L 21/768 (2006.01) H01L 23/522 (2006.01)

Patent

CA 1215788

ABSTRACT INTEGRATED CIRCUIT PROCESSING METHODS An integrated circuit processing method comprises the formation on a substrate (10) of a metallised conductor pattern (11). A layer of insulating material (12) is formed over the conductor pattern and a mask (14) is superimposed thereon. The mask is resistant to plasma etching and is provided at predetermined positions with apertures (15) defining required void outlines. Plasma etching through the mask forms vias (16) in the insulating layer (12) which communicate with the metallised conductor pattern (11). The mask (14) is removed to leave the integrated circuit with communicating vias (16) which enable connection to the conductor pattern (11).

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