G - Physics – 06 – F
Patent
G - Physics
06
F
354/230.81
G06F 12/00 (2006.01) G06F 9/38 (2006.01) G06F 9/42 (2006.01) G06F 12/06 (2006.01)
Patent
CA 1275504
INSTRUCTION MEMORY SYSTEM ABSTRACT A memory system for storing and delivering instructions to a central processing unit in a data processing system is described. Each program to be exeucted by the central processing unit is stored in the instruction memory as a plurality tracks. Each track consists of a sequential list of instructions which are executed in the order in which said instructions are stored unless a jump instruction contained in said track is executed. Each track ends with a jump instruction and begins with an instruction which is a target instruction of at least one jump instruction stored in the present invention. The present invention delivers the non-jump instructions to the central processing unit. Jump instructions are executed within the memory system of the present invention. The memory system of the present invention includes a main memory, a buffer memory and a control unit. The main memory includes a series of memory slots, each such memory slot being used to store one track. The control unit copies each track into the buffer memory prior to delivering instructions from that track to the central processing unit. This buffer has a pointer which specifies the next instruction in the buffer to be examined. If the instruction so indicated is a non-jump instruction, it is delivered to the central processing unit. If the instruction is a jump instruction which is to be executed, the present invention causes the track which begins with the target instruction specified in the jump instruction to be loaded into the buffer, if said track is not already in the buffer. Then it sets the pointer to specify the first instruction in said track. The present invention communicates with the central processing unit over a bus which includes signal lines under the control of the central processing unit. One or more of these signal lines may be used to control conditional jumps. In addition, these signal lines are used to signal the present invention in the event of an interrupt. To facilitate programming techniques which employ subroutine calls and interrupts, registers are provided for storing the address of the next instruction to be executed. The present invention supports special jump instructions which result in program execution resuming at the address stored in one of these registers. These special jump instructions allow jumps to be executed to target instructions which are not at the beginning of a track.
528058
Coates William Stuart
Davis Alan Lynn
Macrae & Co.
Schlumberger Technology Corporation
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