Outer tape automated bonding semiconductor package

Details Outer tape automated bonding semiconductor package Outer tape automated bonding semiconductor package

H - Electricity

01

L

356/143

H01L 23/50 (2006.01) H01L 21/60 (2006.01) H01L 23/498 (2006.01)

Patent

CA 1279733

OUTER TAPE AUTOMATED BONDING SEMICONDUCTOR PACKAGE ABSTRACT A semiconductor package for protecting a semiconductor chip such as a Very Large Scale Integration chip and connecting it to an electrical circuit is disclosed. The chip is bonded to a section of Tape Automated Bonding, (TAB), tape which contains a number of leads thereover, each lead has an inner lead section bonded to the chip and an outer lead section that extends beyond the outer perimeter of the tape, for connecting to the circuit. The chip is enclosed in a housing which subtends an area slightly larger than the chip itself. The inner lead sections project from the TAB tape into the housing and are bonded to the chip. A metal layer under the TAB tape is connected to a number of the leads. After the semiconductor package of this invention is assembled, the outer leads are attached to the associated circuit so as to connect the chip to the circuit. The metal layer serves as a reference plane so the leads connected thereto supply a voltage that does not vary to sub-circuits on the chip.

568779

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