Error correction method using reed-solomon code

Details Error correction method using reed-solomon code Error correction method using reed-solomon code

H - Electricity

03

M

354/223

H03M 13/00 (2006.01) H03M 13/15 (2006.01)

Patent

CA 1295744

ABSTRACT OF THE DISCLOSURE In an error correction method using Reed-Solomon code when the error correction is performed by using the result of the multiplication of a syndrome and an error location, another syndrome is added to thereby form a new syndrome. By repetitively executing this procedure, the error vector is obtained by a small number or arithmetic operations relative to a known procedure, thereby performing error correction by the so-called erasure correction technique. Then, by calculating another error vector using the first calculated error vector, the number of arithmetic operation times can be even further reduced.

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