G - Physics
06
F
354/230.87
G06F 9/38 (2006.01) G06F 9/318 (2006.01)
Patent
CA 1260150
ABSTRACT OF THE DISCLOSURE An information processing system includes a processor responsive to instructions for performing operations. The proces- sor includes an instruction queue portion for fetching and storing instructions in advance of execution and the system is responsive to certain of the instructions for causing execution of a corres- ponding sequence of instructions. A prefetch monitor includes an element for detecting instructions which may result in the exe- cution of a corresponding sequence of instructions. The prefetch monitor further includes an instruction substitution element which is responsive to the detecting element for inhibiting the reading of following instructions from the memory to the processor and is responsive to instruction fetching operation of the processor for reading null instructions to the processor. The prefetch monitor also includes a synchronization element which is responsive to fetching operation of the processor for detecting transfer of execution to a next valid instruction, wherein the substitution element is responsive to the synchronization element for resuming reading of instructions from the memory to the processor with the next valid instruction. The synchronization element includes a portion for maintaining synchronization between the operations of substituting null instructions and the execution of the instructions. In a specific implementation, the instruc- tions which may result in the execution of a corresponding sequence of instructions are foreign to the system, a corresponding non- maskable interrupt results in the execution of a routine which emulates the execution of the foreign instruction and the null instructions are jump-to-self instructions.
514332
Angel David J.
Cardone Gary A.
Holbrook Mark D.
Moskun James P.
Patterson Bruce
Lg Semicon Co. Ltd.
Smart & Biggar
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