Apparatus for forcing a reload from main memory upon cache...

G - Physics – 06 – F

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354/224

G06F 11/14 (2006.01) G06F 11/10 (2006.01) G06F 12/08 (2006.01) G06F 12/12 (2006.01)

Patent

CA 1311304

ABSTRACT OF THE INVENTION In a data processing system, there is included a central processing unit (CPU) and a main memory for storing computer words, the CPU including a cache unit. In operation, the CPU requests that a computer word be fetched, the computer word to be fetched being identified by a real address location corresponding to a location where the predetermined computer word is stored in main memory. The CPU request to fetch the computer word is coupled through the cache unit such that the cache unit determines whether the computer word is stored within the cache unit. The cache unit comprises a cache for storing predetermined ones of the computer words. A directory is included for storing partial real address information to a corresponding computer word stored in the cache. A detecting element, operatively connected to the cache and to the directory, determines when a hit occurs without any errors. Control logic, operatively connected to the detecting element, makes available to the CPU the requested computer word from the cache or the main memory when an error is detected as a result of attempting to obtain the computer word from the cache.

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