Computer with interface for fast and slow memory cycles

Details Computer with interface for fast and slow memory cycles Computer with interface for fast and slow memory cycles

Category

G - Physics

Subcategory

06

Subsubcategory

F

CPC

354/236

IPC codes

G06F 3/14 (2006.01) G06F 15/20 (1990.01)

Type

Patent

Patent number

CA 1293329

Description

ABSTRACT OF THE DISCLOSURE A CPU with an interface to two different RAMs which operate at different rates. The interface circuit includes a decoder which examines the addresses from the CPU and determines whether a faster cycle or slower cycle is needed. The slow RAM provides video signals to a video display. The fast RAM includes an image of the video signals stored in the first RAM. When the video signals are read by the CPU, they are read only from the fast RAM, however, when it is necessary to update the video signals, they are written into both the slow and fast RAMs.

Application Number

562910

Affiliated with

Also associated with

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