G - Physics – 06 – F
Patent
G - Physics
06
F
354/167
G06F 7/48 (2006.01) G06F 7/50 (2006.01) G06F 7/74 (2006.01)
Patent
CA 1292321
ABSTRACT In a floating point addition or subtraction procedures, two shift operations of the operand fraction may be required. The first shift operation, based on the difference between the operand exponent arguments, involves aligning one of the operand arguments so that the addition or subtraction procedure between the operand fractions can be performed. In order to complete the associated computations correctly, it is necessary to know if any of the fraction positions removed from the fraction by the shift operation include non-zero signals, i.e., the operation referred to as computation of the "sticky" bit. The second important shift operation occurs after the addition or subtraction of the operand fractions has taken place. The interim resulting operand fraction must be normalized, i.e., a non-zero signal is placed in the most significant operand fraction bit position and the operand exponent argument adjusted accordingly. In order to accomplish this normalization, the position of the leading one (most significant non-zero) bit must be identified. The present invention utilizes a carry chain both for computing the "sticky" bit information and for detecting the leading one in an operand fraction.
575522
Bowhill William Johnson
Gavrielov Nachum Moshe
Peng Victor
Digital Equipment Corporation
Smart & Biggar
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