Computer workstation with interrupt signaling arrangement

Details Computer workstation with interrupt signaling arrangement Computer workstation with interrupt signaling arrangement

G - Physics

06

F

354/230.82

G06F 13/34 (2006.01)

Patent

CA 1315889

ABSTRACT OF THE DISCLOSURE A computer workstation including a processor, one or more input/output units, such as disk devices or network interfaces, a program memory and a video memory which contains video information displayed on a video monitor. An arbitration circuit selects among the processor and input/output units for transfers to and from the program memory and video memory. A master control circuit controls timing of transfers to and from the program and video memories, and periodically enables video update transfers of video information from the video memory to video control circuits, which control the video monitor. While a video update is in progress, the master control circuit holds off other transfer request of the processor and input/output units with the memory. The program memory stores interrupt vectors. In response to interrupt requests from units which require interrupt service, the master control circuit interrupts the processor. When the processor acknowledges the interrupt, the master control circuit enables the transfer from the memory to the processor of the interrupt vector associated with the highest priority interrupt.

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