Secure system-on-chip

G - Physics – 06 – F

Patent

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G06F 21/00 (2006.01)

Patent

CA 2633373

The aim of the present invention is to provide a secure system-on-chip for processing data, this system-on-chip comprising at least a central processing unit, an input and an output channel, an encryption/decryption engine and a memory, characterized in that, said system-on-chip comprises an autonomous supervision module which is preprogrammed with normal working conditions definitions of at least the input and/or output data flow, and means to disable the input and/or output channel if the current conditions exceed the normal conditions definitions.

L'invention concerne un système sur une seule puce sécurisé afin de traiter des données. Ce système sur une seule puce comprend au moins un processeur central, un canal d'entrée et de sortie, un moteur de cryptage/décryptage et une mémoire. Il comprend, de façon caractéristique, un module de supervision autonome préprogrammé par des définitions de conditions de travail normales d'au moins le flux de données d'entrée et/ou de sortie, ainsi que des moyens servant à désactiver le canal d'entrée et/ou de sortie si les conditions présentes dépassent les définitions des conditions normales.

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