Diversity circuit and frame phase (or sampling timing)...

Details Diversity circuit and frame phase (or sampling timing)... Diversity circuit and frame phase (or sampling timing)...

H - Electricity

04

B

325/42

H04B 7/08 (2006.01) H04L 1/06 (2006.01) H04L 25/02 (2006.01)

Patent

CA 2037824

A diversity circuit is disclosed which includes CIR estimation circuits, error computers for computing the ratios of the estimated CIR power to the error power between the estimated and actual received signal for respective received signals, a comparator for comparing respective ratios, and a selector for outputting the received signal and the CIR corresponding to the maximum power ratio. A frame phase (or sampling timing) estimation circuit using the diversity circuit further includes a delay circuit for providing a received signal with different delays, whereby the selector outputs the delayed received signal and the CIR corresponding to the maximum power ratio.

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