Network synchronization architecture for a broadband loop...

Details Network synchronization architecture for a broadband loop... Network synchronization architecture for a broadband loop...

H - Electricity

04

L

H04L 29/02 (2006.01) H04J 3/06 (2006.01) H04L 7/00 (2006.01) H04L 12/28 (2006.01) H04L 29/10 (2006.01)

Patent

CA 2369805

This disclosure describes a Network Synchronization Architecture, which allows the synchronization hardware component to be co-located with the Optical Network Interface component. This architecture is used to provide network timing for a Network Element (NE) such as a BLC (Broadband Loop Carrier System). A Broadband Loop Carrier system is similar in functionality to a DLC (Digital Loop Carrier), the primary difference being the ability to provide some form of high speed data service such as ADSL (asymmetric digital subscriber loop). To accommodate this network timing architecture, the NE provides redundant timing paths between the combined Optical Network Interface/Synchronization Units of which there are two for each system. A control function monitors the hardware and signal conditions to maintain functionality in the presence of hardware faults or input signal faults.

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