Frequency detector based on a digital phase lock loop

H - Electricity – 04 – B

Patent

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325/30

H04B 7/26 (2006.01) H03D 13/00 (2006.01)

Patent

CA 2031145

The invention relates to a frequency detector based on a digi- tal phase lock, the detector being especially suitable for use in an SAT frequency detector of mobile telephones in the TACS and AMPS systems. The detector part of the detector according to the invention comprises a detection timer (6) which forms a detection sequence of the desired length, at the end of which the output signal (SATVAL) of the detector part (5) is updated; a first phase detector VI1 (7) having a detection window in which it counts those rising or falling edges of the synchron- ized input signal (SSAT) which coincide with the windows a second phase detector VI2 (8) also having a detection window of its own in which it counts those rising or falling edges of the synchronized input signal (SSAT) which coincide with the win- dow, the detection windows being made up of an SAT signal (S01) formed by the digital phase lock loop and of its harmonics, in which case, if at the end of a detection sequence the counter of the first phase detector VI1 (7) exceeds and the counter of the second phase detector VI2 (8) falls short of its predeter- mined threshold value, the detector part (5) will interpret the received signal as correct.

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