Method of controlling arithmetic pipeline configuration in...

G - Physics – 06 – F

Patent

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354/166

G06F 9/302 (2006.01) G06F 15/177 (2006.01)

Patent

CA 2006382

Abstract of the Disclosure In a method of controlling an arithmetic pipeline configuration in a multiprocessor system, a given arithmetic processor controls its own arithmetic pipeline configuration in accordance with arithmetic pipeline configuration information common to all the arithmetic processors when the given arithmetic processor is logically connected to the system under operation. The given arithmetic processor controls its own arithmetic pipeline configuration in accordance with its own arithmetic pipeline configuration information independently of other arithmetic processors when the given processor is logically disconnected from the system under operation.

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