Programmable delayed dispatch in a multi-threaded pipeline

Details Programmable delayed dispatch in a multi-threaded pipeline Programmable delayed dispatch in a multi-threaded pipeline

G - Physics

06

F

G06F 9/30 (2006.01) G06F 9/38 (2006.01) G06F 9/45 (2006.01)

Patent

CA 2533741

Detecting a stall condition associated with processor instructions within one or more threads and generating a no-dispatch condition. The stall condition can be detected by hardware and/or software before and/or during processor instruction execution. The no-dispatch condition can be associated with a number of processing cycles and an instruction from a particular thread. As a result of generating the no-dispatch condition, processor instructions from other threads may be dispatched into the execution slot of an available execution pipeline. After a period of time, the instruction associated with the stall can be fetched and executed.

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