Pattern matching apparatus

H - Electricity – 04 – L

Patent

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Details

H04L 27/00 (2006.01) H04L 7/04 (2006.01)

Patent

CA 2216272

In a multi-value modulation system such as M bits/1 symbol, a pattern matching apparatus is arranged by a coincident bit number detecting circuit for detecting a coincident bit number between a received symbol and the known pattern of a receiver within 1 symbol; a delay circuit for delaying the detection result; and an adder. Then, a coincident bit number between the received 1 symbol (M bits) and 1 symbol (M bits) of the known pattern is detected. These detected bit numbers are added to each other, so that when a length of a UW pattern is N bits, the total number of adders can be reduced to N/M.

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