Memory mapped deflection correction system

Details Memory mapped deflection correction system Memory mapped deflection correction system

H - Electricity

01

J

355/17

H01J 29/70 (2006.01) H04N 9/28 (2006.01)

Patent

CA 2002266

A memory mapped deflection correction system for use in correcting misconvergence in color CRTs. The invention utilizes predetermined convergence values by storing these values in an on-board memory. Apparatus for spatial domain interpolation interpolates the stored values into intermediate convergence correction values. The intermediate values are reconstructed into analog convergence signals using a reconstruction means, including an analog to digital converter and an amplifier inherently including a time domain filter. The amplifier then drives the convergence yoke of the CRT.

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