Second-layer phase change memory array on top of a logic device

Details Second-layer phase change memory array on top of a logic device Second-layer phase change memory array on top of a logic device

H - Electricity

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L

H01L 27/06 (2006.01) G11C 5/00 (2006.01) G11C 11/56 (2006.01) G11C 16/02 (2006.01) H01L 21/34 (2006.01)

Patent

CA 2231377

The present invention is a computational unit comprising a logic processing device (10), and a memory array (30) deposited on top of and communicating with the logic process- ing device. More specifically, the present in- vention is a computational unit comprising a logic processing device (10), and electrically erasable phase change memory (30) deposited on top of and communicating with the logic processing device.

La présente invention se rapporte à une unité de calcul comportant un dispositif logique de traitement (10) et une matrice de mémoire (30) qui est placée au-dessus du dispositif de traitement logique et qui communique avec celui-ci. De manière plus spécifique, cette invention consiste en une unité de calcul comportant un dispositif logique de traitement (10) et une mémoire (30) à changement de phase effaçable électriquement qui est placée au-dessus du dispositif de traitement logique et qui communique avec celui-ci.

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