Method and apparatus for addressing memory

Details Method and apparatus for addressing memory Method and apparatus for addressing memory

G - Physics

06

F

G06F 12/02 (2006.01) G06F 12/04 (2006.01)

Patent

CA 2145379

A method and apparatus for addressing memory is disclosed. In one embodiment, a procedure for providing a word with fixed width, having a fixed number of bits to be used for addressing variable width data, and having a width defining field and address field, is disclosed. In addition, a procedure for addressing memory with a fixed width word, having a fixed number of bits, to be used for addressing data and having a substitution field and an address field, is discussed. Also, an apparatus for addressing memory, including a state machine and an arithmetic core is disclosed.

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