Fault-tolerant computer and method of controlling same

Details Fault-tolerant computer and method of controlling same Fault-tolerant computer and method of controlling same

G - Physics

06

F

G06F 11/07 (2006.01) G06F 11/16 (2006.01) G06F 13/00 (2006.01)

Patent

CA 2531089

A fault-tolerant computer has duplex systems each comprising a CPU subsystem for controlling access to a CPU and a storage unit, and an IO subsystem for controlling data which are input to the IO subsystem from an external circuit and output from the IO subsystem to the external circuit. Data with a transmission time assigned thereto is transmitted from one of the IO subsystems to the other IO subsystem, and is received asynchronously by the other IO subsystem. The other IO subsystem records a reception time of the data, and calculates an ideal reception time using the transmission time assigned to the data. A clock shift in the other IO subsystem with respect to the one IO subsystem is calculated from the calculated ideal reception time and the recorded reception time. Thereafter, the counter in the other IO subsystem is changed based on the calculated clock shift, and data is received using the changed counter.

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