H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 5/14 (2006.01) H04L 12/40 (2006.01)
Patent
CA 2042298
The primary device (DSP) is connected to m x n secondary devices (ESLIC1-4) by one data link (IOB) comprising the m x n data channels assigned to respective secondary devices (ESLIC1-4) say m clock links (GKCO-1 ) connected to m respective groups each of n secondary devices (ESLIC1-3; ESLIC2-4) and carrying m clock signals having a same clock frequency and being mutually shifted by 1/mth of a cycle of the clock frequency, and by n read/write links (RDO-1) connected to n respective groups each of m secondary devices (ESLIC1-2; ESLIC3-4) and carrying n read/write signals mutually shifted by one cycle of the clock frequency, each secondary device (ESLIC1-4) belonging to a distinct pair of one group out of the m groups (ESLIC1-3; ESLIC2-4) and of one group out of the n groups ( ESLIC1-2; ESLIC3-4).
Le dispositif primaire (DSP) est connecté à m x n dispositifs secondaires (ESLIC1-4) par une liaison de données (IOB) comprenant les m x n canaux de données affectés aux dispositifs secondaires respectifs (ESLIC1-4), mettons m liaisons d'horloge (GKCO-1) raccordées aux m groupes respectifs de chacun n dispositifs secondaires (ESLIC1-3; ESLIC2-4), et acheminant m signaux d'horloge ayant une même fréquence d'horloge et décalés mutuellement de 1/me d'un cycle de la fréquence d'horloge; et par n liaisons de lecture-écriture (RDO-1) raccordées aux n groupes respectifs de dispositifs secondaires (ESLIC1-2; ESLIC 3-4) et acheminant n signaux de lecture-écriture décalés mutuellement d'un cycle de la fréquence d'horloge, chaque dispositif secondaire (ESLIC1-4) appartenant à une paire distincte d'un des m groupes (ESLIC1-3; ESLIC2-4) et d'un des n groupes (ESLIC1-2; ESLIC3-4).
Op de Beeck Edmond Celina Jozef
Sevenhans Joannes Mathilda Josephus
Alcatel N.v.
Smart & Biggar
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