Apparatus and method for providing byte and word compatible...

Details Apparatus and method for providing byte and word compatible... Apparatus and method for providing byte and word compatible...

G - Physics

06

F

354/235

G06F 15/16 (2006.01) G06F 12/04 (2006.01) G06F 13/40 (2006.01)

Patent

CA 1129110

ABSTRACT OF THE DISCLOSURE A digital processor, memory or other digital in- formation circuit can be made compatible in a computer system which includes both 8 or 16 bit digital users within the system. The 16 bit system and local buses are divided into an upper and lower half with each half having a separate upper and lower buffer circuit respectively. A swap byte buffer is provided for selectively coupling digital information on the upper half of the local bus to the lower half of the system bus. The lower, upper, and swap byte buffers are selectively enabled in response to a discrete command signal and in the case of memory transfers, to the least significant bit of the memory address.

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