Method of making electrical connections to integrated circuit

Details Method of making electrical connections to integrated circuit Method of making electrical connections to integrated circuit

H - Electricity

01

L

H01L 23/488 (2006.01) H01L 21/60 (2006.01) H01L 23/498 (2006.01) H01L 23/50 (2006.01)

Patent

CA 2156941

A method of making electrical connections to an integrated circuit chip, comprises providing at least one chip having exposed conductors on its active surface, providing a substrate having conductors on its surface corresponding to said exposed conductors on the chip, mounting the chip on the substrate so that said conductors are in accurate alignment with the corresponding ding conductors on the substrate, bonding the chip to said substrate, and filling any voids between the conductors on the chip and the corresponding conductors on said substrate with a conductive material. This method removes the limitation imposed by the large pad size needed for conventional techniques.

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