Method and apparatus for processing interruption

G - Physics – 06 – F

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G06F 9/46 (2006.01) G06F 9/38 (2006.01)

Patent

CA 2103988

Shadow registers for processing program interrupts are provided in a CPU. When control shifts to an interrupt routine, the shadow registers axe used by the interrupt routine by switching from the use of ordinary registers, the use of the shadow registers. The ordinary registers are excluded from use during the execution of the interrupt. Subsequent to the completion of the interrupt, the ordinary registers are re-used without the necessity of the storing and re-storing the contents of the ordinary registers.

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