Method and apparatus for an accelerated graphic port using...

Details Method and apparatus for an accelerated graphic port using... Method and apparatus for an accelerated graphic port using...

G - Physics

06

F

G06F 3/14 (2006.01) G09G 5/00 (2006.01) G09G 5/36 (2006.01)

Patent

CA 2285878

An accelerated graphic port connection is adapted for differential signaling. Two signal lines are provided for each graphic port and chipset connection signal and information is encoded as either a polarity or a magnitude of a voltage difference between the two signal lines. An enhanced graphic chip and chipset includes drivers and receivers capable of handling the differential signaling. The resulting accelerated graphic port architecture supports clocking data on both edges as well as source synchronous clocking. The enhanced accelerated graphic port architecture also supports split transactions, deep read pipelining, and the addition of new bus synchronization commands.

Affiliated with

Also associated with

Rating

Method and apparatus for an accelerated graphic port using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for an accelerated graphic port using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for an accelerated graphic port using... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1548961