Multifunction processor timer

G - Physics – 06 – F

Patent

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Details

G06F 1/04 (2006.01) G06F 1/025 (2006.01) G06F 1/14 (2006.01) G06F 9/48 (2006.01) H03K 21/38 (2006.01)

Patent

CA 2249927

The programmable timer for use in a microprocessor has a counter and a reset register each connected to a databus of the microprocessor, and a first comparator for comparing the counter against the reset register in providing the result of the comparison at a first comparison output. The counter includes a clock signal input for counting clock pulses. The counter may be reset to a reset value via a reset input provided on the counter. The reset register may receive and store a digital value from the microprocessor. The first comparison output is connected to the reset input in order to reset the counter when the counter reaches a count greater than or equal to the value stored in the reset register thereby providing a periodic signal at the first comparison output. The programmable timer may operate in various modes including, an interval timing mode, a PWM encode mode and a pulse timing mode.

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