Method and apparatus for receiving a binary digital signal

Details Method and apparatus for receiving a binary digital signal Method and apparatus for receiving a binary digital signal

H - Electricity

03

K

328/87

H03K 5/13 (2006.01) H04L 7/033 (2006.01)

Patent

CA 2017539

ABSTRACT OF THE DISCLOSURE The reception of the binary digital signal that may also have phase shifts should be accomplished with a supplied clock that has an arbitrary phase relation compared to the digital signal and can deviate somewhat in frequency from the bit repetition rate of the digital signal. In the disclosed structure, the digital signal is delayed in a delay chain such that a sequence of digital signals having identical phase spacings arises and pulses are derived from the edges thereof. Query pulses are generated from the leading or trailing edges of a clock, the query pulses being operated with the pulses generated from the digital signals through AND gates. In a following, further AND gate, each output signal of one of the AND gates is through-connected to an OR gate. The output of the OR gate is sampled with delayed query pulses in a D flip-flop such that the sampling occurs approximately one-fourth of a clock period following the effective edge of the output signal.

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