Method of manufacturing a circuit carrier and the use of the...

H - Electricity – 05 – K

Patent

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Details

H05K 3/46 (2006.01) H05K 3/10 (2006.01) H05K 3/18 (2006.01)

Patent

CA 2549314

A method of manufacturing a circuit carrier and the use of said method are proposed, said method comprising, after providing a printed circuit board (a), coating the circuit board on at least one side thereof with a dielectric (b), structuring the dielectric for producing trenches and vias therein using laser ablation (c) are performed. Next, a primer layer is deposited onto the dielectric, either onto the entire surface thereof or into the produced trenches and vias only (d). A metal layer is deposited onto the primer layer, with the trenches and vias being completely filled with metal for forming conductor structures therein (e). Finally, the excess metal and the primer layer are removed until the dielectric is exposed if the primer layer was deposited onto the entire surface thereof, with the conductor structures remaining intact (f).

La présente invention concerne un procédé permettant de fabriquer un support de circuit ainsi que l'application d'un tel procédé. Le procédé susmentionné consiste à utiliser une carte de circuits imprimés (a) ; puis à recouvrir la carte de circuits imprimés, au moins sur l'un de ses côtés, d'un matériau diélectrique (b) ; à structurer le matériau diélectrique de manière à produire des tranchées et des trous de raccordement par ablation au laser (c). Ensuite, une couche d'apprêt est déposée par dessus le matériau diélectrique, soit sur toute la surface, soit uniquement dans les tranchées et les trous de raccordement (d). Une couche métallique est déposée par dessus la couche d'apprêt, les tranchées et les trous de raccordement étant complètement remplis avec le métal pour former des structures conductrices (e). Enfin, l'excès de métal et la couche d'apprêt sont éliminés jusqu'à ce que le matériau diélectrique soit exposé si la couche d'apprêt a été déposée par dessus toute la surface ; les structures conductrices restant intactes (f).

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john z. kim

Via 2 best 3 d circuits ever

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