H - Electricity – 04 – L
Patent
H - Electricity
04
L
340/205
H04L 7/00 (2006.01) H04J 3/06 (2006.01)
Patent
CA 2014259
The frequency of a clock for a receiving terminal is controlled based on a predetermined clock frequency of a terminal that produces a continuous stream of data at a predetermined frequency for transmission to the receiving terminal over a communications network of the kind in which data is transmitted between the terminals in discrete packets that are delayed on the network by possibly different amounts. Arrivals of packets that are sent to the receiving terminal are detected, time intervals between the arrivals of successive packets are determined, and the time intervals are processed to generate an estimate that is related to the predetermined frequency. The frequency of the receiving terminal clock is controlled in response to the estimate. In one aspect, the time intervals are determined by measuring time differences of arrival between successive packets, and the measured time differences are filtered to generate the estimate. In another aspect, the time intervals are determined by measuring phase differences between a reference signal (that indicates the arrival of each packet) and the receiving terminal clock, and the measured phase differences are filtered to generate the estimate.
Motorola Inc.
Smart & Biggar
LandOfFree
Synchronizing continuous bit stream oriented terminals in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronizing continuous bit stream oriented terminals in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronizing continuous bit stream oriented terminals in a... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1593780