Method and device for generating a frame check sequence

Details Method and device for generating a frame check sequence Method and device for generating a frame check sequence

H - Electricity

04

L

H04L 1/22 (2006.01) H03M 13/11 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2252325

A frame conveyed across the network is divided into a plurality of segments with an identical number of bits. All of the bits of a segment are received simultaneously, with each segment of the frame being received sequentially. Very often, the number of bits in the entire frame, will not be an integer multiple of the number of bits in the segment. Therefore the bits of the frame can be unevenly divided into the plurality of segments. The present invention detects the number of bits from the frame that are present in each of the segments, or at least the number of bits of the frame present in the last segment. An FCS function is used to create a segment FCS function which operates on all the bits of a segment at one time. The original FCS function is preferably an 8 bit function, which combines a present 8 bit word with the FCS calculated for previous 8 bit word in order to generate a new FCS for the present 8 bit word and all previous 8 bit words. By combining all the equations that would normally be required for all the 8 bit words in a segment, a segment FCS function is created which removes many redundant terms. Each segment is combined with a previous intermediate or segment FCS, to create a new intermediate FCS for the present segment and all previous segments. Subsegment FCS functions are also determined for each of all possible numbers of frame bits that are possible in a segment. The number of frame bits is detected and the corresponding subsegment FCS function is used.

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