H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 19/00 (2006.01) H03K 5/153 (2006.01) H03K 19/0175 (2006.01) H04L 25/02 (2006.01)
Patent
CA 2199902
An interface circuit transmits a binary logic signal by transmitting a pulse at a first potential at each falling transition of the binary logic signal, and a pulse at a second potential at each rising transition of the binary logic signal. At other times, the output terminal of the driver circuit is placed in the high-impedance state. The receiver circuit outputs a first logic level upon receiving a pulse at the first potential, and outputs a second logic level upon receiving a pulse at the second potential. Output of these logic levels is maintained until the next pulse is received. The transmission line is preferably terminated at a potential intermediate between the first and second potentials.
L'invention est un circuit d'interface qui transmet un signal logique binaire en transmettant une impulsion à un premier potentiel à chaque transition descendante de ce signal logique binaire, et une impulsion à un second potentiel à chaque transition ascendante de ce signal logique binaire. Aux autres moments, la borne de sortie du circuit d'attaque est mise à l'état de haute impédance. Le circuit de réception produit un premier niveau logique à la réception d'une impulsion au premier potentiel, et un second niveau logique à la réception d'une impulsion au second potentiel. La production de ces niveaux logiques est maintenue jusqu'à la réception de l'impulsion suivante. Dans la concrétisation privilégiée de l'invention, la ligne de transmission est terminée à un potentiel qui se trouve entre le premier et le second potentiels précités.
Fetherstonhaugh & Co.
Oki Electric Industry Co. Ltd.
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